HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 57

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

control register
March 2003 (rev. A)
HFC-E1
Card level
address
0x30
0x31
0x60
0x61
0x70
0x71
0x74
Read / write
Mode
r/w
r/w
r/w
r/w
r/w
r/w
r
Config state
Config state
Config state
Config state
Config state
Config state
Config state
Accessable
Universal external bus interface
Table 2.11: ISA Plug and Play registers
in state
Data Sheet
Description
Activate register.
Setting bit 0 to ’1’ activates the card on the ISA bus. When
cleared, the card cannot respond to any ISA bus transac-
tions (other than accesses to its Plug and Play configura-
tion ports). Reset clears bit 0. Bits 1 . . . 7 are reserved
and return zeros when read. The HFC-E1 only supports
one logical device, so it is not necessary to write the log-
ical device number into the card’s logical device number
register prior to writing to this register.
I/O range check register.
Bits
0
1
7..2
I/O decoder 0 base address upper byte.
I/O port base address bits 8 . . . 15.
I/O decoder 0 base address lower byte.
I/O port base address bits 0 . . . 7.
IRQ select configuration register 0.
Bits 0 . . . 3 specify the selected IRQ number. Bits 4 . . . 7
are reserved.
IRQ type configuration register 0.
Bits 0 and 1 are ignored. Bits 2 . . . 7 are reserved.
DMA configuration register 0.
Bits
2..0
7..3
Because no DMA is used this register is hardwired to
0x04.
Function
When set, the logical device returns 0x55 in response to any
read from the logical device’s assigned I/O space. When
cleared, 0xAA is returned.
When set to one, enables I/O range checking and disables it
when cleared to zero. When enabled, bit 0 is used to select a
pattern for the logical device to return. This bit is only valid
if the logical device is deactivated (see Activate register).
Reserved, return zero when read
Function
Select which DMA channel (0 . . . 7) is used for DMA 0.
DMA channel 4, the cascade channel, indicates no DMA
channel is active.
Reserved.
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Cologne
Chip
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