HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 217

no-image

HFC-S2M

Manufacturer Part Number
HFC-S2M
Description
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer
Cologne Chip AG
Datasheet
March 2003 (rev. A)
HFC-E1
R_BERT_ECH
BERT error counter, high byte
7..0
Bits
0
Value
Reset
V_BERT_ECH
Name
Auxiliary interface
(read only)
Data Sheet
Description
Bits 15 . . . 8 of the BERT error counter
Note: Low byte must be read first (see register
R_BERT_ECL ).
Cologne
Chip
217 of 272
0x1B

Related parts for HFC-S2M