HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 165

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HFC-S2M

Manufacturer Part Number
HFC-S2M
Description
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer
Cologne Chip AG
Datasheet
March 2003 (rev. A)
HFC-E1
R_RX_OFF
E1 receive buffer configuration register
1..0
2
7..3
Bits
0
0
Value
Reset
V_RX_SZ
Name
V_RX_INIT
(reserved)
(write only)
E1 interface
Data Sheet
Description
Buffer size
Elastic buffer size in number of frames (0 . . . 3)
Buffer initialization
Some data may be lost when this bit is set.
This bit is automatically cleared.
Must be ’00000’.
Cologne
Chip
165 of 272
0x30

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