HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 140

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
(See Table 4.3 for reset value.)
(See Table 4.3 for reset value.)
(See Table 4.3 for reset value.)
140 of 272
A_Z2L [FIFO]
FIFO output counter
This address can also be accessed with word width to read the complete
counter (see register A_Z2).
Before reading this array register the FIFO must be selected by register R_FIFO.
7..0
A_Z2H [FIFO]
FIFO output counter
Before reading this array register the FIFO must be selected by the register R_FIFO.
7..0
A_Z2 [FIFO]
FIFO output counter
Before reading this array register the FIFO must be selected by register R_FIFO.
15..0
Bits
Bits
Bits
0
0
0
Reset
Value
Reset
Value
Reset
Value
Name
V_Z2L
Name
V_Z2H
Name
V_Z2
¾
¾
¾
, low byte
, high byte
FIFO handling and HDLC controller
(read only)
(read only)
(read only)
Data Sheet
Bits [7..0] counter value of ¾
Bits [15..8] counter value of ¾
Bits [15..0] counter value of ¾
Description
Description
Description
March 2003 (rev. A)
Cologne
Chip
0x06
0x07
0x06
¾
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