HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 72

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
Symbol
Ø
Ø
Ø
Ø
Ø
Ø
Ø
Ø
72 of 272
ÊÏË
ÊÏÀ
ÏÊ
Á Ä
Ë
À
ÏÊË
ÏÊÀ
½ ¡ Ø
¿ ¡ Ø
¿ ¡ Ø
min / ns
¡ Ø
ÄÃÁ
ÄÃÁ
ÄÃÁ
ÄÃÁ
10
10
20
10
20
2
2
Table 2.21: Symbols of write accesses in Figures 2.10 and 2.12
max / ns
Universal external bus interface
Characteristic
Address and /BE valid to /DS+/CS (/RD+/CS)
Address hold time after /DS+/CS (/RD+/CS)
Write data setup time to /DS+/CS (/WR+/CS)
Write data hold time from /DS+/CS (/WR+/CS)
R/W setup time to /DS+/CS
R/W hold time after /DS+/CS
Write time
/DS+/CS (/RD+/CS) high time
A[7] = ’0’ (address range 0 . . . 0x7F: normal register access)
A[7,6] = ’10’ (address range 0x80 . . . 0xBF: FIFO data access)
A[7,6] = ’11’ (address range 0xC0 . . . 0xFF: direct RAM access)
– after byte access
– after word access
Data Sheet
March 2003 (rev. A)
setup time
Cologne
Chip