HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 151

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HFC-S2M

Manufacturer Part Number
HFC-S2M
Description
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer
Cologne Chip AG
Datasheet
March 2003 (rev. A)
HFC-E1
frame clock
SYNC_I
E1 RX
FOI
Synchronization Selection
Figure 5.2: Detail of the E1 interface synchronization selection shown in Figure 5.1
V_PCM_SYNC
MUX
V_NEG_CLK
MUX
E1 interface
Data Sheet
divider
÷ 2
V_HCLK
MUX
V_EXT_CLK_SYNC
MUX
Cologne
Chip
151 of 272
E1 TX
frame clock
to JATT

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