HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 178

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
178 of 272
PCM pins:
Number
CODEC select via enable lines:
Number
CODEC select via time slot number:
Number
106
107
108
109
110
111
112
113
114
117
118
119
120
121
107
108
109
110
111
112
113
114
97
98
Table 6.2: Overview of the HFC-E1 PCM pins
Name
SYNC_I
SYNC_O
C2O
C4IO
F0IO
STIO1
STIO2
Name
F1_7
F1_6
F1_5
F1_4
F1_3
F1_2
F1_1
F1_0
Name
F_Q6
F_Q5
F_Q4
F_Q3
F_Q2
F_Q1
F_Q0
SHAPE1
SHAPE0
( : Second pin function)
PCM interface
Data Sheet
PCM bit clock output
PCM double bit clock I/O
PCM frame clock I/O (8 kHz)
PCM data bus 1, I or O per time slot
PCM data bus 2, I or O per time slot
PCM CODEC enable 7
PCM CODEC enable 6
PCM CODEC enable 5
PCM CODEC enable 4
PCM CODEC enable 3
PCM CODEC enable 2
PCM CODEC enable 1
PCM CODEC enable 0
Description
Synchronization Input
Synchronization Output
Description
Description
PCM time slot count 6
PCM time slot count 5
PCM time slot count 4
PCM time slot count 3
PCM time slot count 2
PCM time slot count 1
PCM time slot count 0
PCM CODEC enable shape signal 1
PCM CODEC enable shape signal 0
March 2003 (rev. A)
Cologne
Chip