HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 134

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
the frame which is just being transmitted to the E1 interface side of the HFC-E1.
the end of frame pointer of the current output frame.
In the transmit HFC-channels
ware driver wants to say “end of transmit frame”. This is done by setting the bit V_INC_F
in register R_INC_RES_FIFO. Then the current value of
and 1 is used as start address of the next frame.
can be accessed for transmit FIFOs if V_FZ_MD in the register R_RAM_MISC is set.
4.3.2 FIFO full condition in HDLC transmit HFC-channels
Due to the limited number of registers in the HFC-E1 the driver software must maintain a
list of frame start and end addresses to calculate the actual FIFO size and to check the FIFO
full condition. Because there is a maximum of 32 (resp. 16 with 32k RAM) frame counter
values and the start address of a frame is the incremented value of the end address of the
last frame the memory table needs to have only 32 (resp. 16) values of 16 bit instead of 64
(resp. 32).
Remember that an increment of -value
There are two different FIFO full conditions. The first one is met when the FIFO contents
comes up to 31 frames (128k or 512k RAM) or 15 frames (32k RAM). There is no possibility
134 of 272
½´ ½µ
CRC2
is used for the frame which is just written from the host bus side.
G
The HFC-E1 begins to transmit the bytes from a FIFO at the moment
the FIFO is changed (writing R_FIFO) or the
Switching to the FIFO that is already selected also starts the transmission.
Thus by selecting the same FIFO again transmission can be started.
HDLC flag
01111110
Please note !
data
data
Figure 4.2: FIFO data organization in HDLC mode
FIFO handling and HDLC controller
zero - inserted data
½
is only incremented from the host interface side if the soft-
Data Sheet
Å
frame
Z1 (F1)
data
data
is
¾´ ¾µ
ÅÁÆ
CRC1
CRC1
in all FIFOs!
½
can not be accessed while
counter is incremented.
½
is stored,
CRC2
CRC2
March 2003 (rev. A)
HDLC-frame
Data in
transmit FIFO
Data in
receive FIFO
STAT = 00h if CRC o.k.
HDLC flag
01111110
¾´ ¾µ
½
STAT
is incremented
Cologne
Chip
is used for
½´ ¾µ
½´ ¾µ
is