HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 39

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

March 2003 (rev. A)
HFC-E1
194
195
196
197
198
199
200
201
202
203
Pin
Interface
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
Name
VDD
VDD
PME_IN
GND
PME
NC
INTA#
/INT
RST#
RESET
GND
PCICLK
GND
GND
VDD
AD31
FL0
VDD
VDD
/SPISEL
GND
GND
SPI_RX
NC
NC
SPI_TX
NC
IREQ#
/INT
RESET
RESET
RESET
GND
GND
SPICLK
SA15
A15
FL0
Ood
Ood
Ood
Ood
I/O
IO
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
General description
Description
+3.3 V power supply
+3.3 V power supply
+3.3 V power supply
Power Management Event Input
Ground
Ground
Ground
Power Management Event output
Interrupt request
Interrupt request
Interrupt request
Interrupt request
Reset low active
Reset high active
Ground
PCI Clock Input
Ground
Ground
Ground
Ground
+3.3 V power supply
Address / Data bit 31
Fixed level (low), connect to
Fixed level (low), connect to
+3.3 V power supply
SPI device select low active
SPI receive data input
SPI transmit data output
Reset high active
Reset high active
Reset high active
SPI clock input
Address bit 15
Address bit 15
ground via ext. pull-down
ground via ext. pull-down
Data Sheet
(continued from previous page)
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
(continued on next page)
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Chip
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