HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 223

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HFC-S2M

Manufacturer Part Number
HFC-S2M
Description
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer
Cologne Chip AG
Datasheet
It is possible to perfom byte, word or double word accesses. Word or double word are
splitted into two or four consecutive byte accesses. The accesses are all executed on the
same address. Thus word and double word accesses are useful for FIFO style buffered data
transfers from or to an external device.
11.2.4 Host mode
Auxiliary-to-host accesses can be performed in two ways. In I/O mapped mode two CIP
bytes must be programmed to execute read and write accesses. The second way uses the
memory mapped mode and the register R_BRG_CTRL.
Bridge access in I/O mapped mode
This mode is supported for PCI I/O mode, PCMCIA, ISA PnP and SPI modes.
The host-to-auxiliary bridge uses two CIP bytes for read and write access control in I/O
mapped mode. Figure 11.2 shows the bit mapping of these bytes. Please see Figure 11.2 on
page 223 concerning the CIP bytes. If V_BRG_EN is set in the register R_BRG_PCM_CFG
all CIP writes must be 16 bit writes.
As A[11] and CS[0] are located on the same CIP bit, it is either possible to use more than
4 external devices with 11 bit address bus width or to use up to 4 external devices with full
12 bit address bus width.
With 12 bit address space a small external circuitry is required to connect the external devices
to the HFC-E1 chip select lines. In detail, /BRG_CS0 and /BRG_CS1 must be OR-ed to
select the first device, /BRG_CS2 and /BRG_CS3 must be OR-ed to select the second
device, and so on.
March 2003 (rev. A)
HFC-E1
Host
10
12
13
14
15
11
0
1
2
3
4
5
6
7
8
9
2 address bytes
A[0]
A[1]
A[2]
A[3]
A[4]
A[5]
A[6]
A[7]
A[8]
A[9]
A[10]
A[11],CS[0]
CS[1]
CS[2]
M[0]
M[1]
Figure 11.2: Host bridge structure in I/O mapped mode
Auxiliary interface
Access
mode
Data Sheet
HFC-E1
3
12
CS[0..2]
Demultiplexer
/BRG_CS[0..7]
BRG_A[0..11]
BRG_D[0..7]
/BRG_WR
/BRG_RD
0
7
connected pins
8
2
up to
12
8
2
address
data
control
chip select
address
data
control
chip select
address
data
control
chip select
Cologne
Chip
device #0
device #1
device #7
223 of 272
external
external
external

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