AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 1145
AT91SAM9G45-CU
Manufacturer Part Number
AT91SAM9G45-CU
Description
MCU ARM9 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-CU.pdf
(10 pages)
Specifications of AT91SAM9G45-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
800 MHz
Number Of Programmable I/os
160
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
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Quantity:
1 000
Company:
Part Number:
AT91SAM9G45-CU
Manufacturer:
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45.12.24 Dithering Pattern DP6_7 Register
Name: DP6_7
Address:0x00500838
Access: Read-write
Reset value: 0xF5FFAFF
• DP6_7: Pattern value for 6/7 duty cycle
45.12.25 Power Control Register
Name: PWRCON
Address:0x0050083C
Access: Read-write
Reset value: 0x0000000e
• LCD_PWR: LCD module power control
0 = lcd_pwr signal is low, other lcd_* signals are low.
0->1 = lcd_* signals activated, lcd_pwr is set high with the delay of GUARD_TIME frame periods.
1 = lcd_pwr signal is high, other lcd_* signals are active.
1->0 = lcd_pwr signal is low, other lcd_* signals are active, but are set low after GUARD_TIME frame periods.
• GUARD_TIME
Delay in frame periods between applying control signals to the LCD module and setting LCD_PWR high, and between set-
ting LCD_PWR low and removing control signals from LCD module
• LCD_BUSY
Read-only field. If 1, it indicates that the LCD is busy (active and displaying data, in power on sequence or in power off
sequence).
6438F–ATARM–21-Jun-10
LCD_BUSY
31
23
15
31
23
15
–
7
–
–
7
30
22
14
30
22
14
–
6
–
–
–
6
29
21
13
29
21
13
–
5
–
–
–
5
GUARD_TIME
28
20
12
28
20
12
–
4
–
–
–
4
DP6_7
DP6_7
DP6_7
27
19
11
27
19
11
3
–
–
–
3
26
18
10
26
18
10
2
–
–
–
2
DP6_7
AT91SAM9G45
25
17
25
17
9
1
–
–
9
–
1
LCD_PWR
24
16
24
16
8
0
–
–
8
–
0
1145
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