AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 41

• Manufacturer Part Number: AT91SAM9G45-CU
• Description: MCU ARM9 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 800 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6438F–ATARM–21-Jun-10
Table 5 shows the Thumb instruction set, for further details, see the ARM Technical Reference
Manual.
Table 9-4
Table 9-4.
Mnemonic
MOV
ADD
SUB
CMP
TST
AND
EOR
LSL
ASR
MUL
B
BX
LDR
LDRH
LDRB
LDRSH
LDMIA
PUSH
BCC
• Exception-generating instruction
gives the Thumb instruction mnemonic list.
Thumb Instruction Mnemonic List
Operation
Move
Add
Subtract
Compare
Test
Logical AND
Logical Exclusive OR
Logical Shift Left
Arithmetic Shift Right
Multiply
Branch and Exchange
Load Word
Load Half Word
Load Byte
Load Signed Halfword
Load Multiple
Push Register to stack
Conditional Branch
Branch
Mnemonic
MVN
ADC
SBC
CMN
NEG
BIC
ORR
LSR
ROR
BLX
BL
SWI
STR
STRH
STRB
LDRSB
STMIA
POP
BKPT
AT91SAM9G45
Operation
Move Not
Add with Carry
Subtract with Carry
Compare Negated
Negate
Bit Clear
Logical (inclusive) OR
Logical Shift Right
Rotate Right
Branch, Link, and Exchange
Branch and Link
Software Interrupt
Store Word
Store Half Word
Store Byte
Load Signed Byte
Store Multiple
Pop Register from stack
Breakpoint
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