AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 935

MCU ARM9 324-TFBGA

AT91SAM9G45-CU

Manufacturer Part Number
AT91SAM9G45-CU
Description
MCU ARM9 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91SAM9G45-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
800 MHz
Number Of Programmable I/os
160
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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40. Touch Screen ADC Controller (TSADCC)
40.1
40.2
6438F–ATARM–21-Jun-10
Description
Embedded Characteristics
The Touch Screen ADC Controller is based on a Successive Approximation Register (SAR) 10-
bit Analog-to-Digital Converter (ADC). It also integrates:
The conversions extend from 0V to TSADVREF.
The TSADCC supports an 8-bit or 10-bit resolution mode, and conversion results are reported in
a common register for all channels, as well as in a channel-dedicated register.
Conversions can be started for all enabled channels, either by a software trigger, by detection of
a rising edge on the external trigger pin TSADTRG or by an integrated programmable timer.
When the Touch Screen is enabled, a timer-triggered sequencer automatically configures the
power switches, performs the conversions and stores the results in dedicated registers.
The TSADCC also integrates a Sleep Mode and a Pen-Detect Mode and connects with one
PDC channel. These features reduce both power consumption and processor intervention.
The TSADCC timings, like the Startup Time and Sample and Hold Time, are fully configurable.
• a 8-to-1 analog multiplexer for analog-to-digital conversions of up to 8 analog lines
• 4 power switches that measure both axis positions on the resistive touch screen panel
• 1 additional power switch and an embedded resistor that detects pen-interrupt and pen loss
• 8-channel ADC
• Support 4-wire resistive Touch Screen
• 10-bit 384 Ksamples/sec. Successive Approximation Register ADC
• -3/+3 LSB Integral Non Linearity, -2/+2 LSB Differential Non Linearity
• Integrated 8-to-1 multiplexer, offering eight independent 3.3V analog inputs
• External voltage reference for better accuracy on low voltage inputs
• Individual enable and disable of each channel
• Multiple trigger sources
• Sleep Mode and conversion sequencer
– Hardware or software trigger
– External trigger pin
– Automatic wakeup on trigger and back to sleep mode after conversions of all
enabled channels
AT91SAM9G45
935

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