AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 222

• Manufacturer Part Number: AT91SAM9G45-CU
• Description: MCU ARM9 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 800 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

21.15 Static Memory Controller (SMC) User Interface
The SMC is programmed using the registers listed in
gram the parameters of the external device connected on it. In
16 bytes (0x10) are required per chip select.
The user must complete writing the configuration by writing any one of the SMC_MODE registers.
Table 21-8.
6438F–ATARM–21-Jun-10
0x10 x CS_number + 0x00
0x10 x CS_number + 0x04
0x10 x CS_number + 0x08
0x10 x CS_number + 0x0C
0xC0
0xC4
0xC8
0xCC
0xD0
0xD4
0xD8
0xDC
0xEC-0xFC
Offset
Register Mapping
Register
SMC Setup Register
SMC Pulse Register
SMC Cycle Register
SMC Mode Register
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
Reserved
Table
21-8. For each chip select, a set of 4 registers is used to pro-
SMC_DELAY1
SMC_DELAY2
SMC_DELAY3
SMC_DELAY4
SMC_DELAY5
SMC_DELAY6
SMC_DELAY7
SMC_DELAY8
Table
SMC_SETUP
SMC_PULSE
SMC_CYCLE
SMC_MODE
Name
-
21-8, “CS_number” denotes the chip select number.
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Access
-
AT91SAM9G45
0x01010101
0x10001000
0x01010101
0x00030003
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
-
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