AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 611

• Manufacturer Part Number: AT91SAM9G45-CU
• Description: MCU ARM9 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 800 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 33-48. Master Node Configuration, NACT=IGNORE
33.7.8.21
6438F–ATARM–21-Jun-10
TXRDY
RXRDY
US_LINIR
LINTC
Write
Slave Node Configuration
Break
Write NACT, PARDIS, CHKDIS, CHKTYPE, DLCM and DLC in US_LINMR to configure the
frame transfer.
IMPORTANT: if the NACT configuration for this frame is PUBLISH, the US_LINMR register,
must be write with NACT = PUBLISH even if this field is already correctly configured, in order to
set the TXREADY flag and the corresponding PDC write transfer request.
What comes next depends on the NACT configuration:
Header
Synch
• Write TXEN and RXEN in US_CR to enable both the transmitter and the receiver.
• Write USART_MODE in US_MR to select the LIN mode and the Slave Node configuration.
• Write CD and FP in US_BRGR to configure the baud rate.
• Wait until LINID in US_CSR rises
• Check LINISFE and LINPE errors
• Read IDCHR in US_RHR
• Case 1: NACT = PUBLISH, the LIN controller sends the response
• Case 2: NACT = SUBSCRIBE, the USART receives the response
• Case 3: NACT = IGNORE, the USART is not concerned by the response
– Wait until TXRDY in US_CSR rises
– Write TCHR in US_THR to send a byte
– If all the data have not been written, redo the two previous steps
– Wait until LINTC in US_CSR rises
– Check the LIN errors
– Wait until RXRDY in US_CSR rises
– Read RCHR in US_RHR
– If all the data have not been read, redo the two previous steps
– Wait until LINTC in US_CSR rises
– Check the LIN errors
– Wait until LINTC in US_CSR rises
Protected
Identifier
Data3
Response
space
Frame slot = TFrame_Maximum
Frame
Data 1
Response
Data N-1
Data N
AT91SAM9G45
Checksum
FSDIS=1
space
frame
Inter-
FSDIS=0
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