AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 624

MCU ARM9 324-TFBGA

AT91SAM9G45-CU

Manufacturer Part Number
AT91SAM9G45-CU
Description
MCU ARM9 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91SAM9G45-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
800 MHz
Number Of Programmable I/os
160
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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• CHRL: Character Length.
• SYNC/CPHA: Synchronous Mode Select or SPI Clock Phase
SYNC = 0: USART operates in Asynchronous Mode.
SYNC = 1: USART operates in Synchronous Mode.
CPHA = 0: Data is changed on the leading edge of SPCK and captured on the following edge of SPCK.
CPHA = 1: Data is captured on the leading edge of SPCK and changed on the following edge of SPCK.
CPHA determines which edge of SPCK causes data to change and which edge causes data to be captured. CPHA is used
with CPOL to produce the required clock/data relationship between master and slave devices.
• PAR: Parity Type
• NBSTOP: Number of Stop Bits
• CHMODE: Channel Mode
624
0
0
1
1
0
0
0
0
0
1
1
– If USART does not operate in SPI Mode (USART_MODE is
– If USART operates in SPI Mode (USART_MODE = 0xE or 0xF):
CHMODE
0
0
1
1
NBSTOP
AT91SAM9G45
CHRL
PAR
0
0
1
1
0
1
0
1
0
1
0
0
1
0
1
Asynchronous (SYNC = 0)
1 stop bit
1.5 stop bits
2 stop bits
Reserved
Mode Description
Normal Mode
0
1
0
1
x
x
Character Length
5 bits
6 bits
7 bits
8 bits
Parity Type
Even parity
Odd parity
Parity forced to 0 (Space)
Parity forced to 1 (Mark)
No parity
Multidrop mode
0xE and 0xF):
Synchronous (SYNC = 1)
1 stop bit
Reserved
2 stop bits
Reserved
6438F–ATARM–21-Jun-10

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