AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 612
AT91SAM9G45-CU
Manufacturer Part Number
AT91SAM9G45-CU
Description
MCU ARM9 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-CU.pdf
(10 pages)
Specifications of AT91SAM9G45-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
800 MHz
Number Of Programmable I/os
160
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9G45-CU
Manufacturer:
ATMEL
Quantity:
1 000
Company:
Part Number:
AT91SAM9G45-CU
Manufacturer:
Atmel
Quantity:
31
Part Number:
AT91SAM9G45-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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Figure 33-49. Slave Node Configuration, NACT = PUBLISH
Figure 33-50. Slave Node Configuration, NACT = SUBSCRIBE
Figure 33-51. Slave Node Configuration, NACT = IGNORE
33.7.8.22
6438F–ATARM–21-Jun-10
TXRDY
RXRDY
LINIDRX
US_LINID
US_RHR
LINTC
TXRDY
RXRDY
LINIDRX
US_LINID
US_RHR
LINTC
TXRDY
RXRDY
LINIDRX
US_LINID
US_THR
LINTC
Write
Read
Read
Read
Read
Read
LIN Frame Handling With The Peripheral DMA Controller
Break
Break
Break
The USART can be used in association with the Peripheral DMA Controller (PDC) in order to
transfer data directly into/from the on- and off-chip memories without any processor intervention.
Synch
Synch
Synch
– Check the LIN errors
Protected
Protected
Protected
Identifier
Identifier
Identifier
Data 1
Data 2
Data 1
Data 1
Data 1
Data 1
Data 3
Data N-2
Data N
Data N-1
Data N-1
Data N-1
Data N-1
Data N
Data N
Data N
AT91SAM9G45
Data N
Checksum
Checksum
Checksum
612
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