AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 54

• Manufacturer Part Number: AT91SAM9G45-CU
• Description: MCU ARM9 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 800 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.4.2
10.5
54
Debug and Test Pin Description
AT91SAM9G45
Test Environment
Figure 10-3 on page 54
preted by the tester. In this example, the “board in test” is designed using a number of JTAG-
compliant devices. These devices can be connected to form a single scan chain.
Figure 10-3. Application Test Environment Example
Table 10-1.
Pin Name
NRST
TST
NTRST
TCK
TDI
TDO
TMS
RTCK
JTAGSEL
DRXD
DTXD
Debug and Test Pin List
AT91SAM9G45-based Application Board In Test
shows a test environment example. Test vectors are sent and inter-
ICE/JTAG
Interface
AT91SAM9G45
JTAG
Function
Microcontroller Reset
Test Mode Select
Test Reset Signal
Test Clock
Test Data In
Test Data Out
Test Mode Select
Returned Test Clock
JTAG Selection
Debug Receive Data
Debug Transmit Data
Chip n
ICE and JTAG
Debug Unit
Test Adaptor
Reset/Test
Chip 2
Chip 1
Input/Output
Tester
Output
Output
Output
Type
Input
Input
Input
Input
Input
Input
Input
6438F–ATARM–21-Jun-10
Active Level
High
Low
Low