AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 773

• Manufacturer Part Number: AT91SAM9G45-CU
• Description: MCU ARM9 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 800 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 36-10. Read Multiple Block and Write Multiple Block
Notes:
6438F–ATARM–21-Jun-10
1. It is assumed that this command has been correctly sent (see
2. Handle errors reported in HSMCI_SR.
The following flowchart
tiple block transfers with the DMA Controller. Polling or interrupt method can be used to wait for
the end of write according to the contents of the Interrupt Mask Register (HSMCI_IMR).
READ_MULTIPLE_BLOCK command (1)
Configure the HDMA channel X
DMAC_SADDRX and DMAC_DADDRX
DMAC_BTSIZE = BlockLength/4
Read status register DMAC_EBCISR
Send SET_BLOCKLEN command (1)
Send WRITE_MULTIPLE_BLOCK or
Send SELECT/DESELECT_CARD
Read status register HSMCI_SR
Set the block length
HSMCI_MR |= (BlockLength << 16)
Set the DMAEN bit
HSMCI_DMA |= DMAEN
command (1) to select the card
Send STOP_TRANSMISSION
and Poll Bit FIFOEMPTY
DMAC_CHEN[X] = TRUE
and Poll Bit CBTC[X]
New Buffer ? (2)
XFRDONE = 1
command
RETURN
Poll the bit
(Figure
No
Yes
(1)
36-10) shows how to manage read multiple block and write mul-
Yes
Figure
No
36-7).
AT91SAM9G45
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