AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 838

• Manufacturer Part Number: AT91SAM9G45-CU
• Description: MCU ARM9 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 800 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 38-8. Data IN Transfer for Endpoint with One Bank
Figure 38-9. Data IN Transfer for Endpoint with Two Banks
838
USB Bus
Packets
TX_PK_RDY
Flag
(UDPHS_EPTSTAx)
TX_COMPLT Flag
(UDPHS_EPTSTAx)
FIFO
Content
USB Bus
Packets
Virtual TX_PK_RDY
bank 0
(UDPHS_EPTSTAx)
Virtual TX_PK_RDY
bank 1
(UDPHS_EPTSTAx)
TX_COMPLT
Flag
(UDPHS_EPTSTAx)
FIFO
(DPR)
Bank 0
FIFO
(DPR)
Bank1
AT91SAM9G45
Written by
Microcontroller
Set by Firmware,
Data Payload Written
in FIFO Bank 0
Microcontroller
Load Data IN Bank 0
Token IN
Set by firmware
Prevous Data IN TX
Token IN
Data IN 1
Data IN 1
Cleared by Hardware
switch to next bank
Microcontroller Load Data IN Bank 1
UDPHS Device Send Bank 0
Cleared by hardware
Set by hardware
Written by
Microcontroller
Read by USB Device
ACK
Data IN
Set by Hardware
DPR access by firmware
Microcontroller Loads Data in FIFO
Token IN
Load in progress
Interrupt Pending
Cleared by Hardware
Data Payload Fully Transmitted
ACK
NAK
Interrupt Pending
Set by the firmware
Interrupt Cleared by Firmware
Token IN
Token IN
Cleared by firmware
Microcontroller Load Data IN Bank 0
UDPHS Device Send Bank 1
Written by
Microcontroller
Set by Firmware,
Data Payload Written in FIFO Bank 1
Data is Sent on USB Bus
DPR access by hardware
Read by UDPHS Device
Data IN 2
Payload in FIFO
Data IN 2
Data IN
Set by Hardware
Cleared by hardware
6438F–ATARM–21-Jun-10
Cleared by firmware
Interrupt Pending
ACK
ACK