AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 547

MCU ARM9 324-TFBGA

AT91SAM9G45-CU

Manufacturer Part Number
AT91SAM9G45-CU
Description
MCU ARM9 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91SAM9G45-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
800 MHz
Number Of Programmable I/os
160
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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32.7.5
Name:
Addresses:
Access:
• TCCLKS: Clock Selection
• CLKI: Clock Invert
0 = counter is incremented on rising edge of the clock.
1 = counter is incremented on falling edge of the clock.
• BURST: Burst Signal Selection
• CPCSTOP: Counter Clock Stopped with RC Compare
0 = counter clock is not stopped when counter reaches RC.
1 = counter clock is stopped when counter reaches RC.
547
CPCDIS
WAVE
0
0
1
1
31
23
15
7
0
0
0
0
1
1
1
1
BURST
AT91SAM9G45
TC Channel Mode Register: Waveform Mode
BSWTRG
ASWTRG
0
1
0
1
CPCSTOP
30
22
14
TC_CMRx [x=0..2] (WAVE = 1)
0xFFF7C004 (0)[0], 0xFFF7C044 (0)[1], 0xFFF7C084 (0)[2], 0xFFFD4004 (1)[0],
0xFFFD4044 (1)[1], 0xFFFD4084 (1)[2]
Read-write
6
TCCLKS
WAVSEL
The clock is not gated by an external signal.
XC0 is ANDed with the selected clock.
XC1 is ANDed with the selected clock.
XC2 is ANDed with the selected clock.
0
0
1
1
0
0
1
1
29
21
13
5
BURST
BEEVT
AEEVT
0
1
0
1
0
1
0
1
ENETRG
28
20
12
4
Clock Selected
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
XC0
XC1
XC2
CLKI
27
19
11
3
BCPC
ACPC
EEVT
26
18
10
2
TCCLKS
25
17
9
1
EEVTEDG
6438F–ATARM–21-Jun-10
BCPB
ACPA
24
16
8
0

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