AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 977

• Manufacturer Part Number: AT91SAM9G45-CU
• Description: MCU ARM9 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 800 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 41-2. DMAC Transfer Hierarchy for Non-Memory Peripheral
Figure 41-3. DMAC Transfer Hierarchy for Memory
6438F–ATARM–21-Jun-10
Transfer
AMBA
Transfer
Burst
Buffer
Chunk
Buffer: A buffer of DMAC data. The amount of data (length) is determined by the flow controller.
For transfers between the DMAC and memory, a buffer is broken directly into a sequence of
AMBA bursts and AMBA single transfers.
For transfers between the DMAC and a non-memory peripheral, a buffer is broken into a
sequence of DMAC transactions (single and chunks). These are in turn broken into a sequence
of AMBA transfers.
Transaction: A basic unit of a DMAC transfer as determined by either the hardware or software
handshaking interface. A transaction is only relevant for transfers between the DMAC and a
source or destination peripheral if the source or destination peripheral is a non-memory device.
There are two types of transactions: single transfer and chunk transfer.
DMAC transfer: Software controls the number of buffers in a DMAC transfer. Once the DMAC
transfer has completed, then hardware within the DMAC disables the channel and can generate
Transfer
AMBA
Burst
Buffer
– Single transfer: The length of a single transaction is always 1 and is converted to a
– Chunk transfer: The length of a chunk is programmed into the DMAC. The chunk is
Transfer
AMBA
Transfer
Burst
single AMBA access.
then converted into a sequence of AHB access.DMAC executes each AMBA burst
transfer by performing incremental bursts that are no longer than 16 beats.
Chunk
Buffer
HDMA Transfer
Transfer
AMBA
Burst
Buffer
HDMA Transfer
Transfer
AMBA
Burst
Transfer
Chunk
Buffer
Transfer
AMBA
Burst
Transfer
AMBA
Single
Buffer
Transfer
AMBA
Single
Transfer
Transfer
Single
AMBA
Single
DMA Transfer
Level
Buffer Transfer
Level
AMBA Transfer
Level
DMA Transfer
Level
Buffer Transfer
Level
DMA Transaction
Level
AMBA Transfer
Level
AT91SAM9G45
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