AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 989

MCU ARM9 324-TFBGA

AT91SAM9G45-CU

Manufacturer Part Number
AT91SAM9G45-CU
Description
MCU ARM9 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91SAM9G45-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
800 MHz
Number Of Programmable I/os
160
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Figure 41-8. DMAC Transfer Flow for Source and Destination Linked List Address
41.4.5.4
6438F–ATARM–21-Jun-10
Multi-buffer Transfer with Source Address Auto-reloaded and Destination Address Auto-reloaded (Row 10)
Buffer Complete interrupt
generated here
HDMA Transfer Complete
interrupt generated here
1. Read the Channel Enable register to choose an available (disabled) channel.
2. Clear any pending interrupts on the channel from the previous DMAC transfer by read-
ing the interrupt status register. Program the following channel registers:
SADDRx, DADDRx, CTRLA/Bx, DSCRx
Writeback of HDMA_CTRLAx
HDMA State Machine Table?
register in system memory
Hardware reprograms
DMAC buffer transfer
Channel Disabled by
Channel enabled by
Is HDMA in
LLI Fetch
hardware
Row1 of
software
yes
no
AT91SAM9G45
989

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