LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 115

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
UM10360
User manual
8.5.14 Pin Mode select register 7 (PINMODE7 - 0x4002 C05C)
8.5.15 Pin Mode select register 9 (PINMODE9 - 0x4002 C064)
8.5.16 Open Drain Pin Mode select register 0 (PINMODE_OD0 - 0x4002 C068)
This register controls pull-up/pull-down resistor configuration for Port 3 pins 16 to 31. For
details see
Table 92.
[1]
This register controls pull-up/pull-down resistor configuration for Port 4 pins 16 to 31. For
details see
Table 93.
This register controls the open drain mode for Port 0 pins. For details see
mode select register
Table 94.
PINMODE7 Symbol
17:0
19:18
21:20
31:22
PINMODE9 Symbol
23:0
25:24
27:26
31:28
PINMODE
_OD0
0
1
2
3
4
5
6
7
8
9
Not available on 80-pin package.
Pin Mode select register 7 (PINMODE7 - address 0x4002 C05C) bit description
Pin Mode select register 9 (PINMODE9 - address 0x4002 C064) bit description
Open Drain Pin Mode select register 0 (PINMODE_OD0 - address 0x4002 C068) bit
description
Section 8.4 “Pin mode select register
Section 8.4 “Pin mode select register
Symbol
P0.00OD
P0.01OD
P0.02OD
P0.03OD
P0.04OD
P0.05OD
P0.06OD
P0.07OD
P0.08OD
P0.09OD
-
P4.28MODE
P4.29MODE
-
P3.25MODE
P3.26MODE
-
-
All information provided in this document is subject to legal disclaimers.
[3]
[3]
values”.
Rev. 2 — 19 August 2010
Value Description
0
1
[1]
[1]
Description
Reserved.
Port 4 pin 28 control, see P0.00MODE.
Port 4 pin 29 control, see P0.00MODE.
Reserved.
Port 0 pin 0 open drain mode control.
P0.0 pin is in the normal (not open drain) mode.
P0.0 pin is in the open drain mode.
Port 0 pin 1 open drain mode control, see P0.00OD
Port 0 pin 2 open drain mode control, see P0.00OD
Port 0 pin 3 open drain mode control, see P0.00OD
Port 0 pin 4 open drain mode control, see P0.00OD
Port 0 pin 5 open drain mode control, see P0.00OD
Port 0 pin 6 open drain mode control, see P0.00OD
Port 0 pin 7 open drain mode control, see P0.00OD
Port 0 pin 8 open drain mode control, see P0.00OD
Port 0 pin 9 open drain mode control, see P0.00OD
Description
Reserved
Port 3 pin 25 control, see P0.00MODE.
Port 3 pin 26 control, see P0.00MODE.
Reserved.
Chapter 8: LPC17xx Pin connect block
values”.
values”.
UM10360
© NXP B.V. 2010. All rights reserved.
Section 8.4 “Pin
115 of 840
Reset
value
NA
00
00
NA
Reset
value
NA
00
00
NA
Reset
value
0
0
0
0
0
0
0
0
0
0