LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 728
LPC1767FBD100,551
Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.LPC1767FBD100551.pdf
(2 pages)
2.LPC1767FBD100551.pdf
(840 pages)
3.LPC1767FBD100551.pdf
(65 pages)
Specifications of LPC1767FBD100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4967
935289808551
935289808551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1767FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
Table 626.
UM10360
User manual
Name
R0-R12
MSP
PSP
LR
PC
PSR
ASPR
IPSR
Core register set summary
34.3.1.3 Core registers
Type
RW
RW
RW
RW
RW
RW
RW
RO
Table 625. Summary of processor mode, execution privilege level, and stack use options
[1]
The processor core registers are:
Processor
mode
Thread
Handler
[1]
See
Program Counter
High registers
Low registers
Stack Pointer
Table
Link Register
634.
Required
privilege
Either
Privileged
Either
Either
Either
Privileged
Either
Privileged
All information provided in this document is subject to legal disclaimers.
[2]
Rev. 2 — 19 August 2010
Used to
execute
Applications
Exception handlers
FAULTMASK
CONTROL
PRIMASK
BASEPRI
PC (R15)
SP (R13)
LR (R14)
PSR
R10
R11
R12
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Reset
value
Undefined
See description
Undefined
0xFFFFFFFF
See description
0x01000000
0x00000000
0x00000000
General-purpose registers
Program status register
Exception mask registers
CONTROL register
Chapter 34: Appendix: Cortex-M3 user guide
PSP
Privileged or
Privilege level for
software execution
unprivileged
Always privileged
‡
Description
Section 34.3.1.3.1
Section 34.3.1.3.2
Section 34.3.1.3.2
Section 34.3.1.3.3
Section 34.3.1.3.4
Section 34.3.1.3.5
Table 628
Table 629
[1]
MSP
‡
Stack used
Main stack or process
stack
Main stack
Special registers
‡
Banked version of SP
UM10360
© NXP B.V. 2010. All rights reserved.
[1]
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