LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 232

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 213. USB Endpoint Index register (USBEpIn - address 0x5000 C248) bit description
Table 214. USB MaxPacketSize register (USBMaxPSize - address 0x5000 C24C) bit description
UM10360
User manual
Bit
4:0
31:5
Bit
9:0
31:10 -
Symbol
PHY_EP
-
Symbol
MPS
11.10.4.3 USB Endpoint Index register (USBEpIn - 0x5000 C248)
11.10.4.4 USB MaxPacketSize register (USBMaxPSize - 0x5000 C24C)
11.10.5 USB transfer registers
Description
The maximum packet size value.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Description
Physical endpoint number (0-31)
Reserved, user software should not write ones to reserved bits. The value read from
a reserved bit is not defined.
The device will not respond to any transactions to unrealized endpoints. The SIE
Configure Device command will only cause realized and enabled endpoints to respond to
transactions. For details see
Each endpoint has a register carrying the MaxPacketSize value for that endpoint. This is
in fact a register array. Hence before writing, this register is addressed through the
USBEpIn register.
The USBEpIn register will hold the physical endpoint number. Writing to USBMaxPSize
will set the array element pointed to by USBEpIn. USBEpIn is a write-only register.
On reset, the control endpoint is assigned the maximum packet size of 8 bytes. Other
endpoints are assigned 0. Modifying USBMaxPSize will cause the endpoint buffer
addresses within the EP_RAM to be recalculated. This is a multi-cycle process. At the
end, the EP_RLZED bit will be set in USBDevIntSt
indexing is shown in
[1]
The registers in this group are used for transferring data between endpoint buffers and
RAM in Slave mode operation. See
Fig 28. USB MaxPacketSize register array indexing
Reset value for EP0 and EP1. All other endpoints have a reset value of 0x0.
The Endpoint Index is set via the USBEpIn register. MPS_EP0 to MPS_EP31 are accessed via the
USBMaxPSize register.
All information provided in this document is subject to legal disclaimers.
ENDPOINT INDEX
Figure
Rev. 2 — 19 August 2010
28. USBMaxPSize is a read/write register.
Table
243.
Section 11.14 “Slave mode
Chapter 11: LPC17xx USB device controller
(Table
192). USBMaxPSize array
MPS_EP31
MPS_EP0
operation”.
UM10360
© NXP B.V. 2010. All rights reserved.
0
Reset value
NA
Reset value
0x008
NA
232 of 840
[1]