LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 233
LPC1767FBD100,551
Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.LPC1767FBD100551.pdf
(2 pages)
2.LPC1767FBD100551.pdf
(840 pages)
3.LPC1767FBD100551.pdf
(65 pages)
Specifications of LPC1767FBD100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4967
935289808551
935289808551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1767FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
Table 215. USB Receive Data register (USBRxData - address 0x5000 C218) bit description
Table 216. USB Receive Packet Length register (USBRxPlen - address 0x5000 C220) bit description
Table 217. USB Transmit Data register (USBTxData - address 0x5000 C21C) bit description
UM10360
User manual
Bit
31:0
Bit
9:0
10
11
31:12 -
Bit
31:0
Symbol
RX_DATA
Symbol
PKT_LNGTH
DV
PKT_RDY
Symbol
TX_DATA
11.10.5.1 USB Receive Data register (USBRxData - 0x5000 C218)
11.10.5.2 USB Receive Packet Length register (USBRxPLen - 0x5000 C220)
11.10.5.3 USB Transmit Data register (USBTxData - 0x5000 C21C)
Description
Data received.
Value Description
-
0
1
-
-
Description
Transmit Data.
For an OUT transaction, the CPU reads the endpoint buffer data from this register. Before
reading this register, the RD_EN bit and LOG_ENDPOINT field of the USBCtrl register
should be set appropriately. On reading this register, data from the selected endpoint
buffer is fetched. The data is in little endian format: the first byte received from the USB
bus will be available in the least significant byte of USBRxData. USBRxData is a read-only
register.
This register contains the number of bytes remaining in the endpoint buffer for the current
packet being read via the USBRxData register, and a bit indicating whether the packet is
valid or not. Before reading this register, the RD_EN bit and LOG_ENDPOINT field of the
USBCtrl register should be set appropriately. This register is updated on each read of the
USBRxData register. USBRxPLen is a read-only register.
For an IN transaction, the CPU writes the endpoint data into this register. Before writing to
this register, the WR_EN bit and LOG_ENDPOINT field of the USBCtrl register should be
set appropriately, and the packet length should be written to the USBTxPlen register. On
writing this register, the data is written to the selected endpoint buffer. The data is in little
endian format: the first byte sent on the USB bus will be the least significant byte of
USBTxData. USBTxData is a write-only register.
The remaining number of bytes to be read from the currently selected
endpoint’s buffer. When this field decrements to 0, the RxENDPKT bit will be
set in USBDevIntSt.
Data valid. This bit is useful for isochronous endpoints. Non-isochronous
endpoints do not raise an interrupt when an erroneous data packet is
received. But invalid data packet can be produced with a bus reset. For
isochronous endpoints, data transfer will happen even if an erroneous
packet is received. In this case DV bit will not be set for the packet.
Data is invalid.
Data is valid.
The PKT_LNGTH field is valid and the packet is ready for reading.
Reserved, user software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Chapter 11: LPC17xx USB device controller
UM10360
© NXP B.V. 2010. All rights reserved.
Reset value
0x0000 0000
Reset value
0x0000 0000
Reset value
0
0
0
NA
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