LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 664

IC ARM CORTEX MCU 512K 100-LQFP

LPC1767FBD100,551

Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1767FBD100,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4967
935289808551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1767FBD100,551
Quantity:
9 999
Part Number:
LPC1767FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
UM10360
User manual
34.2.4.2.5 Examples
LDR
LDRNE
STR
STRH
LDRD
STRD
All information provided in this document is subject to legal disclaimers.
R8, [R10]
R2, [R5, #960]!
R2, [R9,#const-struc] ; const-struc is an expression evaluating
R3, [R4], #4
R8, R9, [R3, #0x20]
R0, R1, [R8], #-16
Rev. 2 — 19 August 2010
Chapter 34: Appendix: Cortex-M3 user guide
; Loads R8 from the address in R10.
; Loads (conditionally) R2 from a word
; 960 bytes above the address in R5, and
; increments R5 by 960.
; to a constant in the range 0-4095.
; Store R3 as halfword data into address in
; R4, then increment R4 by 4
; Load R8 from a word 32 bytes above the
; address in R3, and load R9 from a word 36
; bytes above the address in R3
; Store R0 to address in R8, and store R1 to
; a word 4 bytes above the address in R8,
; and then decrement R8 by 16.
UM10360
© NXP B.V. 2010. All rights reserved.
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