LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 449

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
19.9 Details of I
UM10360
User manual
The four operating modes are:
Data transfers in each mode of operation are shown in
Figure
describing the I
Table 395. Abbreviations used to describe an I
In
The numbers in the circles show the status code held in the I2STAT register. At these
points, a service routine must be executed to continue or complete the serial transfer.
These service routines are not critical since the serial transfer is suspended until the serial
interrupt flag is cleared by software.
When a serial interrupt routine is entered, the status code in I2STAT is used to branch to
the appropriate service routine. For each status code, the required software action and
details of the following serial transfer are given in tables from
2
Abbreviation
S
SLA
R
W
A
A
Data
P
Sr
C operating modes
•
•
•
•
Figure 93
Master Transmitter
Master Receiver
Slave Receiver
Slave Transmitter
96, and
to
Figure
Figure
2
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C operating modes.
97.
97, circles are used to indicate when the serial interrupt flag is set.
Rev. 2 — 19 August 2010
Explanation
START condition
7-bit slave address
Read bit (HIGH level at SDA)
Write bit (LOW level at SDA)
Acknowledge bit (LOW level at SDA)
Not acknowledge bit (HIGH level at SDA)
8-bit data byte
STOP condition
Repeated START condition
Table 395
lists abbreviations used in these figures when
2
C operation
Figure
Chapter 19: LPC17xx I2C0/1/2
Table 398
93,
Figure
UM10360
© NXP B.V. 2010. All rights reserved.
to
94,
Table
Figure
402.
449 of 840
95,