LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 393

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
16.17 Examples of acceptance filter tables and ID index values
UM10360
User manual
Fig 70. Clearing message lost
semaphore
MsgLostx
IntPndx
look-up
access
table
bits
16.17.1 Example 1: only one section is used
16.17.2 Example 2: all sections are used
16.17.3 Example 3: more than one but not all sections are used
write
SEM
01
SFF_sa
SFF_GRP_sa <
EFF_sa
EFF_GRP_sa <
The start address of a section is lower than the end address of all programmed CAN
identifiers.
SFF_sa
SFF_GRP_sa <
EFF_sa
EFF_GRP_sa <
In cases of a section not being used, the start address has to be set onto the value of the
next section start address.
If the SFF group is not used, the start address of the SFF Group Section (SFF_GRP_sa
register) has to be set to the same value of the next section start address, in this case the
start address of the Explicit SFF Section (SFF_sa register).
ID,
1st Object
write
D1
write
write
D2
<
<
<
<
SEM
write
11
All information provided in this document is subject to legal disclaimers.
ENDofTable
ENDofTable
ENDofTable
ENDofTable
SFF_GRP_sa
EFF_sa
EFF_GRP_sa
ENDofTable
SEM
write
01
ID,
Rev. 2 — 19 August 2010
2nd Object
write
D1
write
write
D2
write
SEM
11
OR
OR
OR
AND
AND
AND
read
SEM
clear
SEM
00
1st Object
read
read
D1
read
D2
Chapter 16: LPC17xx CAN1/2
SEM
read
message
handler
access
SEM
write
ID,
UM10360
© NXP B.V. 2010. All rights reserved.
write
3rd Object
D1
write
processor
access
write
D2
ARM
write
SEM
393 of 840
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