LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 471
LPC1767FBD100,551
Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.LPC1767FBD100551.pdf
(2 pages)
2.LPC1767FBD100551.pdf
(840 pages)
3.LPC1767FBD100551.pdf
(65 pages)
Specifications of LPC1767FBD100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4967
935289808551
935289808551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1767FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
UM10360
User manual
19.10.8.6 State: 0x88
19.10.8.7 State: 0x90
19.10.8.8 State: 0x98
19.10.8.9 State: 0xA0
19.10.9.1 State: 0xA8
19.10.9 Slave Transmitter states
Previously addressed with own Slave Address. Data has been received and NOT ACK
has been returned. Received data will not be saved. Not addressed Slave mode is
entered.
Previously addressed with General Call. Data has been received, ACK has been returned.
Received data will be saved. Only the first data byte will be received with ACK. Additional
data will be received with NOT ACK.
Previously addressed with General Call. Data has been received, NOT ACK has been
returned. Received data will not be saved. Not addressed Slave mode is entered.
A STOP condition or repeated START has been received, while still addressed as a
Slave. Data will not be saved. Not addressed Slave mode is entered.
Own Slave Address + Read has been received, ACK has been returned. Data will be
transmitted, ACK bit will be received.
1. Write 0x04 to I2CONSET to set the AA bit.
2. Write 0x08 to I2CONCLR to clear the SI flag.
3. Exit
1. Read data byte from I2DAT into the Slave Receive buffer.
2. Write 0x0C to I2CONCLR to clear the SI flag and the AA bit.
3. Exit
1. Write 0x04 to I2CONSET to set the AA bit.
2. Write 0x08 to I2CONCLR to clear the SI flag.
3. Exit
1. Write 0x04 to I2CONSET to set the AA bit.
2. Write 0x08 to I2CONCLR to clear the SI flag.
3. Exit
1. Load I2DAT from Slave Transmit buffer with first data byte.
2. Write 0x04 to I2CONSET to set the AA bit.
3. Write 0x08 to I2CONCLR to clear the SI flag.
4. Set up Slave Transmit mode data buffer.
5. Increment Slave Transmit buffer pointer.
6. Exit
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Chapter 19: LPC17xx I2C0/1/2
UM10360
© NXP B.V. 2010. All rights reserved.
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