LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 130

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
UM10360
User manual
Aside from the 32-bit long and word only accessible FIOxMASK register, every fast GPIO
port can also be controlled via several byte and half-word accessible registers listed in
Table
additional registers allow easier and faster access to the physical port pins.
Table 112. Fast GPIO port Mask byte and half-word accessible register description
Generic
Register
name
FIOxMASK0
FIOxMASK1
FIOxMASK2
FIOxMASK3
FIOxMASKL
FIOxMASKU
112, too. Next to providing the same functions as the FIOxMASK register, these
Description
Fast GPIO Port x Mask
register 0. Bit 0 in
FIOxMASK0 register
corresponds to pin Px.0 …
bit 7 to pin Px.7.
Fast GPIO Port x Mask
register 1. Bit 0 in
FIOxMASK1 register
corresponds to pin Px.8 …
bit 7 to pin Px.15.
Fast GPIO Port x Mask
register 2. Bit 0 in
FIOxMASK2 register
corresponds to pin Px.16 …
bit 7 to pin Px.23.
Fast GPIO Port x Mask
register 3. Bit 0 in
FIOxMASK3 register
corresponds to pin Px.24 …
bit 7 to pin Px.31.
Fast GPIO Port x Mask
Lower half-word register.
Bit 0 in FIOxMASKL
register corresponds to pin
Px.0 … bit 15 to pin Px.15.
Fast GPIO Port x Mask
Upper half-word register.
Bit 0 in FIOxMASKU
register corresponds to pin
Px.16 … bit 15 to Px.31.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Chapter 9: LPC17xx General Purpose Input/Output (GPIO)
Register
length (bits)
& access
8 (byte)
R/W
8 (byte)
R/W
8 (byte)
R/W
8 (byte)
R/W
16
(half-word)
R/W
16
(half-word)
R/W
Reset
value
0x0
0x0
0x0
0x0
0x0
0x0
PORTn Register
Address & Name
FIO0MASK0 - 0x2009 C010
FIO1MASK0 - 0x2009 C030
FIO2MASK0 - 0x2009 C050
FIO3MASK0 - 0x2009 C070
FIO4MASK0 - 0x2009 C090
FIO0MASK1 - 0x2009 C011
FIO1MASK1 - 0x2009 C031
FIO2MASK1 - 0x2009 C051
FIO3MASK1 - 0x2009 C071
FIO4MASK1 - 0x2009 C091
FIO0MASK2 - 0x2009 C012
FIO1MASK2 - 0x2009 C032
FIO2MASK2 - 0x2009 C052
FIO3MASK2 - 0x2009 C072
FIO4MASK2 - 0x2009 C092
FIO0MASK3 - 0x2009 C013
FIO1MASK3 - 0x2009 C033
FIO2MASK3 - 0x2009 C053
FIO3MASK3 - 0x2009 C073
FIO4MASK3 - 0x2009 C093
FIO0MASKL - 0x2009 C010
FIO1MASKL - 0x2009 C030
FIO2MASKL - 0x2009 C050
FIO3MASKL - 0x2009 C070
FIO4MASKL - 0x2009 C090
FIO0MASKU - 0x2009 C012
FIO1MASKU - 0x2009 C032
FIO2MASKU - 0x2009 C052
FIO3MASKU - 0x2009 C072
FIO4MASKU - 0x2009 C092
UM10360
© NXP B.V. 2010. All rights reserved.
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