LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 806

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 179. Receive status information word . . . . . . . . . .174
Table 180. Transmit descriptor fields. . . . . . . . . . . . . . . .176
Table 181. Transmit descriptor control word . . . . . . . . . .176
Table 182. Transmit status fields . . . . . . . . . . . . . . . . . . .176
Table 183. Transmit status information word . . . . . . . . . .177
Table 184. USB related acronyms, abbreviations, and
Table 185. Fixed endpoint configuration . . . . . . . . . . . . .215
Table 186. USB external interface . . . . . . . . . . . . . . . . . .218
Table 187. USB device controller clock sources . . . . . . .219
Table 188. USB device register map . . . . . . . . . . . . . . . .220
Table 189. USBClkCtrl register (USBClkCtrl - address
Table 190. USB Clock Status register (USBClkSt - address
Table 191. USB Interrupt Status register (USBIntSt - address
Table 192. USB Device Interrupt Status register
Table 193. USB Device Interrupt Status register
Table 194. USB Device Interrupt Enable register
Table 195. USB Device Interrupt Enable register
Table 196. USB Device Interrupt Clear register
Table 197. USB Device Interrupt Clear register
Table 198. USB Device Interrupt Set register (USBDevIntSet
Table 199. USB Device Interrupt Set register (USBDevIntSet
Table 200. USB Device Interrupt Priority register
Table 201. USB Endpoint Interrupt Status register
Table 202. USB Endpoint Interrupt Status register
Table 203. USB Endpoint Interrupt Enable register
Table 204. USB Endpoint Interrupt Enable register
Table 205. USB Endpoint Interrupt Clear register
Table 206. USB Endpoint Interrupt Clear register
UM10360
User manual
definitions used in this chapter . . . . . . . . . . . .214
0x5000 CFF4) bit description . . . . . . . . . . . . .221
0x5000 CFF8) bit description . . . . . . . . . . . . .222
0x5000 C1C0) bit description . . . . . . . . . . . . .222
(USBDevIntSt - address 0x5000 C200) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .223
(USBDevIntSt - address 0x5000 C200) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .223
(USBDevIntEn - address 0x5000 C204) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .224
(USBDevIntEn - address 0x5000 C204) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .224
(USBDevIntClr - address 0x5000 C208) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .224
(USBDevIntClr - address 0x5000 C208) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .225
- address 0x5000 C20C) bit allocation . . . . .225
- address 0x5000 C20C) bit description . . . .225
(USBDevIntPri - address 0x5000 C22C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .226
(USBEpIntSt - address 0x5000 C230) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .226
(USBEpIntSt - address 0x5000 C230) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .226
(USBEpIntEn - address 0x5000 C234) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .227
(USBEpIntEn - address 0x5000 C234) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .228
(USBEpIntClr - address 0x5000 C238) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .228
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Table 207. USB Endpoint Interrupt Set register
Table 208. USB Endpoint Interrupt Set register
Table 209. USB Endpoint Interrupt Priority register
Table 210. USB Endpoint Interrupt Priority register
Table 211. USB Realize Endpoint register (USBReEp -
Table 212. USB Realize Endpoint register (USBReEp -
Table 213. USB Endpoint Index register (USBEpIn - address
Table 214. USB MaxPacketSize register (USBMaxPSize -
Table 215. USB Receive Data register (USBRxData -
Table 216. USB Receive Packet Length register
Table 217. USB Transmit Data register (USBTxData -
Table 218. USB Transmit Packet Length register
Table 219. USB Control register (USBCtrl - address 0x5000
Table 220. USB Command Code register (USBCmdCode -
Table 221. USB Command Data register (USBCmdData -
Table 222. USB DMA Request Status register (USBDMARSt
Table 223. USB DMA Request Status register (USBDMARSt
Table 224. USB DMA Request Clear register (USBDMARClr
Table 225. USB DMA Request Set register (USBDMARSet -
Table 226. USB UDCA Head register (USBUDCAH -
Table 227. USB EP DMA Status register (USBEpDMASt -
Table 228. USB EP DMA Enable register (USBEpDMAEn -
Table 229. USB EP DMA Disable register (USBEpDMADis -
Table 230. USB DMA Interrupt Status register
Table 231. USB DMA Interrupt Enable register
(USBEpIntClr - address 0x5000 C238) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
(USBEpIntSet - address 0x5000 C23C) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
(USBEpIntSet - address 0x5000 C23C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
(USBEpIntPri - address 0x5000 C240) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
(USBEpIntPri - address 0x5000 C240) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
address 0x5000 C244) bit allocation . . . . . . 231
address 0x5000 C244) bit description . . . . . 231
0x5000 C248) bit description . . . . . . . . . . . . 232
address 0x5000 C24C) bit description . . . . . 232
address 0x5000 C218) bit description . . . . . 233
(USBRxPlen - address 0x5000 C220) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
address 0x5000 C21C) bit description . . . . . 233
(USBTxPLen - address 0x5000 C224) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
address 0x5000 C210) bit description . . . . . 235
address 0x5000 C214) bit description . . . . . 235
- address 0x5000 C250) bit allocation . . . . . 235
- address 0x5000 C250) bit description . . . . 236
- address 0x5000 C254) bit description . . . . 236
address 0x5000 C258) bit description . . . . . 237
address 0x5000 C280) bit description . . . . . 237
address 0x5000 C284) bit description . . . . . 237
address 0x5000 C288) bit description . . . . . 238
address 0x5000 C28C) bit description . . . . . 238
(USBDMAIntSt - address 0x5000 C290) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
C228) bit description . . . . . . . . . . . . . . . . . . . 234
Chapter 35: Supplementary information
UM10360
© NXP B.V. 2010. All rights reserved.
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