LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 309
LPC1767FBD100,551
Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.LPC1767FBD100551.pdf
(2 pages)
2.LPC1767FBD100551.pdf
(840 pages)
3.LPC1767FBD100551.pdf
(65 pages)
Specifications of LPC1767FBD100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4967
935289808551
935289808551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1767FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
Table 282: UARTn Auto-baud Control Register (U0ACR - address 0x4000 C020, U2ACR - 0x4009 8020, U3ACR -
UM10360
User manual
Bit
8
9
31:10 -
Symbol
ABEOIntClr
ABTOIntClr
0x4009 C020) bit description
14.4.10.1 Auto-baud
Value
The UARTn auto-baud function can be used to measure the incoming baud-rate based on
the “AT” protocol (Hayes command). If enabled the auto-baud feature will measure the bit
time of the receive data stream and set the divisor latch registers UnDLM and UnDLL
accordingly.
Remark: the fractional rate divider is not connected during auto-baud operations, and
therefore should not be used when the auto-baud feature is needed.
Auto-baud is started by setting the UnACR Start bit. Auto-baud can be stopped by clearing
the UnACR Start bit. The Start bit will clear once auto-baud has finished and reading the
bit will return the status of auto-baud (pending/finished).
Two auto-baud measuring modes are available which can be selected by the UnACR
Mode bit. In mode 0 the baud-rate is measured on two subsequent falling edges of the
UARTn Rx pin (the falling edge of the start bit and the falling edge of the least significant
bit). In mode 1 the baud-rate is measured between the falling edge and the subsequent
rising edge of the UARTn Rx pin (the length of the start bit).
The UnACR AutoRestart bit can be used to automatically restart baud-rate measurement
if a time-out occurs (the rate measurement counter overflows). If this bit is set the rate
measurement will restart at the next falling edge of the UARTn Rx pin.
The auto-baud function can generate two interrupts.
The auto-baud interrupts have to be cleared by setting the corresponding UnACR
ABTOIntClr and ABEOIntEn bits.
Typically the fractional baud-rate generator is disabled (DIVADDVAL = 0) during
auto-baud. However, if the fractional baud-rate generator is enabled (DIVADDVAL > 0), it
is going to impact the measuring of UARTn Rx pin baud-rate, but the value of the UnFDR
register is not going to be modified after rate measurement. Also, when auto-baud is used,
any write to UnDLM and UnDLL registers should be done before UnACR register write.
The minimum and the maximum baud rates supported by UARTn are function of pclk,
number of data bits, stop bits and parity bits.
•
•
The UnIIR ABTOInt interrupt will get set if the interrupt is enabled (UnIER ABToIntEn
is set and the auto-baud rate measurement counter overflows).
The UnIIR ABEOInt interrupt will get set if the interrupt is enabled (UnIER ABEOIntEn
is set and the auto-baud has completed successfully).
Description
End of auto-baud interrupt clear bit (write-only accessible). Writing a 1 will
clear the corresponding interrupt in the UnIIR. Writing a 0 has no impact.
Auto-baud time-out interrupt clear bit (write-only accessible). Writing a 1 will
clear the corresponding interrupt in the UnIIR. Writing a 0 has no impact.
Reserved, user software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Chapter 14: LPC17xx UART0/2/3
UM10360
© NXP B.V. 2010. All rights reserved.
Reset value
0
0
NA
309 of 840
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