DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 143

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.4.4
In normal extended mode, the address above the bus address is enabled, which is indicated by the
output strobe signal (AS). In multiplex extended mode, the hold signal (AH) which indicates the
address fetch timing, is output. Output polarity of the AS/ AH signals can be controlled by the
PNCASH bit in BCR.
6.4.5
This LSI can output a maximum of 16 addresses.
In normal extended mode, enabling or disabling of A15 to A0 signal output is set by the data
direction register (DDR) bit for the port corresponding to the A15 to A0 pins. In external extended
mode, the A15 to A0 pins are placed in the input state after a reset, the corresponding DDR bits
should be set to 1 when outputting signals A15 to A0. For details, refer to section 7, I/O Ports.
In multiplex extended mode, the address output is decided by the access area bus width. If the
access area is 16 bits, the lower 16-bit internal addresses are output from A15 to A0 in the address
cycle. If the access area is 8 bits, the lower 8-bit internal addresses are output from A15 to A8 in
the address cycle.
Address Strobe/Hold Signal
Address Output
Rev.2.00 May. 28, 2009 Page 103 of 732
REJ09B0059-0200