DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 9

IC H8S/2437 MCU FLASH 128QFP

DF2437FV

Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of DF2437FV

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Item
12.5.1 Basic Functions
Figure 12.8 Periodic
Counter Operation
13.3.2 Timer Connection
Register O (TCONRO)
Table 13.3 HSYNCO
Output Selection
16.3.7 Serial Status
Register (SSR)
Main Revisions for This Edition
Page
340
390
453
Revision (See Manual for Details)
Figure amended
TGR
H'0000
CST bit
TGF
Table amended
Note amended
Note: * The PB1DR inverted value is output regardless of the
Table amended
HS2
Bit
7
6
1
TCNT value
HS1
1
TECR
Bit Name
TDRE
RDRF
PB1DDR setting.
HS0
0
1
TCONRO_1
HOINV
Initial Value
1
0
Rev.2.00 May. 28, 2009 Page vii of xxxviii
R/W
R/(W)* Transmit Data Register Empty
R/(W)* Receive Data Register Full
TCONRO_0
HOINV
Description
Indicates whether TDR contains transmit data.
[Setting conditions]
[Clearing conditions]
Indicates whether receive data is stored in RDR.
[Setting condition]
[Clearing conditions]
The RDRF flag is not affected and retains its
previous value even if the RE bit in SCR is cleared
to 0.
When the TE bit in SCR is 0
When data is transferred from TDR to TSR
and TDR is ready for data write
When 0 is written to TDRE after reading TDRE
= 1
When serial reception ends normally and
receive data is transferred from RSR to RDR
When 0 is written to RDRF after reading RDRF
= 1
Counter cleared by TGR
compare match
HSYNCO Output Signal
Port output inverted*
Setting prohibited
Flag cleared by software
REJ09B0059-0200
Time

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