DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 386

IC H8S/2437 MCU FLASH 128QFP

DF2437FV

Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of DF2437FV

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
12.5.3
Buffer operation, provided for channel 0, enables TGRC and TGRD to be used as buffer registers.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or as a compare match register. Table 12.17 shows the register combinations used in
buffer operation.
Table 12.17 Register Combinations in Buffer Operation
• When TGR is an output compare register
• When TGR is an input capture register
Example of Buffer Operation Setting Procedure:
Figure 12.18 shows an example of the buffer operation setting procedure.
Rev.2.00 May. 28, 2009 Page 346 of 732
REJ09B0059-0200
Channel
0
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register. This operation is illustrated in figure 12.16.
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
stored in the timer general register is transferred to the buffer register. This operation is
illustrated in figure 12.17.
Buffer Operation
Buffer register
Buffer register
Input capture
signal
Figure 12.16 Compare Match Buffer Operation
Figure 12.17 Input Capture Buffer Operation
Timer General Register
TGRA_0
TGRB_0
Compare match signal
Timer general
register
Timer general
register
Comparator
Buffer Register
TGRC_0
TGRD_0
TCNT
TCNT

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