DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 561

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.4.5
In slave receive mode, the master device outputs the transmit clock and transmit data, and the
slave device returns an acknowledge signal. The operation timings in slave receive mode are
shown in figures 17.11 and 17.12. The reception procedure and operations in slave receive mode
are described below.
1. Set the ICE bit in ICCRA to 1. Set the WAIT bit in ICMR and the CKS3 to CKS0 bits in
2. When the slave address matches in the first frame following detection of the start condition,
(master output)
(master output)
(slave output)
(slave output)
processing
ICCRA to 1 (initial setting). Set the MST and TRS bits in ICCRA to select slave receive mode,
and wait until the slave address matches.
the slave device outputs the level specified by ACKBT in ICIER to SDA, at the rise of the 9th
clock pulse. At the same time, RDRF in ICSR is set to read ICDRR (dummy read). (Since the
read data show the slave address and R/W, it is not used.)
ICDRR
ICDRT
ICDRS
TDRE
TEND
SCL
SDA
SDA
SCL
User
TRS
Slave Receive Operation
Figure 17.10 Operation Timing in Slave Transmit Mode (2)
A
9
Bit 7
1
Bit 6
2
Bit 5
3
Data n
Bit 4
[3] Clear TEND
4
Bit 3
5
Bit 2
6
[4] Read ICDRR (dummy read)
Bit 1
Rev.2.00 May. 28, 2009 Page 521 of 732
Slave transmit mode
after clearing TRS
7
Section 17 I
Bit 0
8
9
A/
2
C Bus Interface 3 (IIC3)
REJ09B0059-0200
[5] Clear TDRE
Slave receive
mode