DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 396

IC H8S/2437 MCU FLASH 128QFP

DF2437FV

Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of DF2437FV

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
12.5.6
In phase counting mode, the phase difference between two external clock inputs is detected and
TCNT is incremented/decremented accordingly. This mode can be set for channels 1 and 2.
When phase counting mode is set, an external clock is selected as the counter input clock and
TCNT operates as an up/down-counter regardless of the settings of bits TPSC2 to TPSC0 and bits
CKEG1 and CKEG0 in TCR. However, since the functions of bits CCLR1 and CCLR0 in TCR,
and of TIOR, TIER, and TGR are valid, and input capture/compare match and interrupt functions
can be used.
When an overflow occurs while TCNT is counting up, the TCFV flag in TSR is set; when an
underflow occurs while TCNT is counting down, the TCFU flag is set.
The TCFD bit in TSR is the count direction flag. Reading the TCFD flag provides an indication of
whether TCNT is counting up or down.
Table 12.20 shows the correspondence between external clock pins and channels.
Table 12.20 Clock Input Pins for Phase Counting Mode
Example of Setting Procedure for Phase Counting Mode:
Figure 12.28 shows an example of the setting procedure for phase counting mode.
Rev.2.00 May. 28, 2009 Page 356 of 732
REJ09B0059-0200
Channels
When channel 1 is set to phase counting mode
When channel 2 is set to phase counting mode
Phase Counting Mode
Figure 12.28 Example of Setting Procedure for Phase Counting Mode
Select phase counting mode
<Phase counting mode>
Phase counting mode
Start counting
[1]
[2]
[1]
[2]
Select phase counting mode with bits MD3 to
MD0 in TMDR.
Set the CST bit in TSTR to 1 to start the count
operation.
TCLKA
TCLKC
A-Phase
External Clock Pins
B-Phase
TCLKB
TCLKD

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