DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 374

IC H8S/2437 MCU FLASH 128QFP

DF2437FV

Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of DF2437FV

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
12.3.7
TGR is a 16-bit readable/writable register with a dual function as output compare and input
capture registers. The TPU has a total of eight TGR registers, four for channel 0 and two each for
channels 1 and 2. TGRC and TGRD for channel 0 can also be designated for operation as buffer
registers. TGR is initialized to H'FFFF by a reset, and in hardware standby mode. TGR cannot be
accessed in 8-bit units; it must always be accessed in 16-bit units. TGR and buffer register
combinations are TGRA—TGRC and TGRB—TGRD.
12.3.8
TSTR selects TCNT operation/stop for channels 0 to 2. If the corresponding bit is set to 1, TCNT
starts counting for the channel. When setting the operating mode in TMDR or setting the count
clock in TCR, first stop the TCNT counter.
Rev.2.00 May. 28, 2009 Page 334 of 732
REJ09B0059-0200
Bit
7 to 3 ⎯
2
1
0
Bit Name Initial Value
CST2
CST1
CST0
Timer General Register (TGR)
Timer Start Register (TSTR)
All 0
0
0
0
R/W
R/W
R/W
R/W
Description
Reserved
The write value should always be 0.
Counter Start 2 to 0
Select operation or stop for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but the
output compare output level for the TIOC pin is retained.
If TIOR is written to when the CST bit is cleared to 0, the
pin output level will be changed to the set initial output
value.
0: TCNTn count operation is stopped
1: TCNTn performs count operation
(n = 2 to 0)

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