DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 609

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3) Programming Execution
When flash memory is programmed, the programming destination address on the user MAT and
program data must be transferred to the downloaded programming program.
1. The start address of the programming destination in the user MAT must be set to the general
2. The program data for the user MAT must be prepared in the consecutive area. The program
For details on the program processing procedure, see section 20.4.2, User Program Mode.
Bit
7 to 2
1
0
register ER1. This parameter is called the flash multipurpose address area parameter
(FMPAR).
Since program data is always in 128 bytes, the lower eight bits (A7 to A0) must be H'00 or
H'80 as the boundary of the programming start address in the user MAT.
data must be in the consecutive space which can be accessed by using the MOV.B instruction
of the CPU and in other than the flash memory space.
When data to be programmed is less than 128 bytes, the 128-byte program data must be
prepared by filling with the dummy code H'FF.
The start address of the area in which the prepared program data is stored must be set to the
general register ER0. This parameter is called the flash multipurpose data destination area
parameter (FMPDR).
Bit Name
⎯
FQ
SF
Initial
Value
⎯
⎯
⎯
R/W
⎯
R/W
R/W
Description
Unused
Return 0.
Frequency Error Detect
Returns the check result whether the specified operating
frequency of the CPU is in the range of the supported
operating frequency.
0: Setting of operating frequency is normal
1: Setting of operating frequency is abnormal
Success/Fail
Indicates whether initialization is completed normally.
0: Initialization is ended normally (no error)
1: Initialization is ended abnormally (error occurs)
Rev.2.00 May. 28, 2009 Page 569 of 732
REJ09B0059-0200