DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 565

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

No
No
No
Dummy reading of ICDRR
Set ACKBT = 0 (ICIER)
Set ACKBT = 1 (ICIER)
Set RCVD = 1 (ICCRA)
Set RCVD = 0 (ICCRA)
Set TRS = 0 (ICCRA)
Set MST = 0 (ICCRA)
Master receive mode
Clear TEND in ICSR
Clear TDRE in ICSR
Read RDRF in ICSR
Read RDRF in ICSR
Clear STOP in ICSR
Read STOP in ICSR
Write BBSY = 0
Read ICDRR
Read ICDRR
Read ICDRR
RDRF = 1 ?
(Last receive
RDRF = 1 ?
STOP = 1 ?
and SCP = 0
End
1)?
Figure 17.15 Sample Flowchart for Master Receive Mode
Yes
Yes
Yes
No
Yes
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Clear STOP flag.
[11] Stop condition issuance
[12] Wait for the generation of stop condition.
[13] Read the receive data of the last byte.
[14] Clear RCVD to 0.
[15] Set slave receive mode.
Note:
Clear TEND, set master receive mode, and then clear TDRE.*
Set acknowledge to the transmit device.*
Dummy reading of ICDDR*
Wait for 1 byte to be received.
Check if (last receive
Read the receive data.
Set acknowledge of the last byte. Disable continuous reception (RCVD = 1).
Read receive data of (last byte
Wait for the last byte to be received.
*
Steps 1 to 3 should be executed
continously.
1).
Rev.2.00 May. 28, 2009 Page 525 of 732
Section 17 I
1).
2
C Bus Interface 3 (IIC3)
REJ09B0059-0200