DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 443

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 13.7 Examples of TCR and TCSR Settings
Register
TCR of TMR1
TCSR of TMR1
TCR of FRT
TCSR of FRT
Bit
7
6
5
4, 3
2 to 0
3 to 0
6
1, 0
0
Abbreviation
CMIEB
CMIEA
OVIE
CCLR1, CCLR0 11
CKS2 to CKS0
OS3 to OS0
IEDGB
CKS1, CKS0
CCLRA
Contents
0
0
0
101
0011
1001
0/1
01
0
Description
Interrupts due to compare-match and
overflow are disabled
TCNT is cleared by the rising edge of the
external reset signal (inverse of the IVI
signal)
of the external clock (IHI signal)
Not changed by compare-match B; output
inverted by compare-match A (toggle
output): Division by 512
When TCORB < TCORA, 1 output on
compare-match B, and 0 output on
compare-match A: Division by 256
0: FRC value is transferred to ICRB on
1: FRC value is transferred to ICRB on
FRC clearing is disabled
TCNT is incremented on the rising edge
FRC is incremented on internal clock: φ/8
falling edge of input capture input B
(IHI divided signal waveform)
rising edge of input capture input B
(IHI divided signal waveform)
Rev.2.00 May. 28, 2009 Page 403 of 732
REJ09B0059-0200