DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 31

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 16.18 Example of SCI Receive Operation in Clocked Synchronous Mode...................484
Figure 16.19 Sample Serial Reception Flowchart .....................................................................485
Figure 16.20 Sample Flowchart of Simultaneous Serial Transmission and Reception .............487
Figure 16.21 Sample Flowchart for Mode Transition during Transmission .............................491
Figure 16.22 Pin States during Transmission in Asynchronous Mode (Internal Clock) ...........492
Figure 16.23 Pin States during Transmission in Clocked Synchronous Mode
Figure 16.24 Sample Flowchart for Mode Transition during Reception...................................493
Figure 16.25 Switching from SCK Pins to Port Pins ................................................................494
Figure 16.26 Prevention of Low Pulse Output at Switching from SCK Pins to Port Pins ........495
Section 17 I
Figure 17.1
Figure 17.2
Figure 17.3
Figure 17.4
Figure 17.5
Figure 17.6
Figure 17.7
Figure 17.8
Figure 17.9
Figure 17.10 Operation Timing in Slave Transmit Mode (2)....................................................521
Figure 17.11 Operation Timing in Slave Receive Mode (1) .....................................................522
Figure 17.12 Operation Timing in Slave Receive Mode (2) .....................................................522
Figure 17.13 Block Diagram of Noise Canceler .......................................................................523
Figure 17.14 Sample Flowchart for Master Transmit Mode .....................................................524
Figure 17.15 Sample Flowchart for Master Receive Mode.......................................................525
Figure 17.16 Sample Flowchart for Slave Transmit Mode .......................................................526
Figure 17.17 Sample Flowchart for Slave Receive Mode.........................................................527
Figure 17.18 Timing of Bit Synchronous Circuit......................................................................529
Section 18 A/D Converter
Figure 18.1
Figure 18.2
Figure 18.3
Figure 18.4
Figure 18.5
Figure 18.6
Figure 18.7
Section 20 Flash Memory (0.18-μm F-ZTAT Version)
Figure 20.1
Figure 20.2
Figure 20.3
2
C Bus Interface 3 (IIC3)
Block Diagram of I
External Circuit Connections of I/O Pins.............................................................499
I
I
Operation Timing in Master Transmit Mode (1)..................................................516
Operation Timing in Master Transmit Mode (2)..................................................516
Operation Timing in Master Receive Mode (1) ...................................................518
Operation Timing in Master Receive Mode (2) ...................................................519
Operation Timing in Slave Transmit Mode (1)....................................................520
Block Diagram of A/D Converter ........................................................................532
A/D Conversion Timing.......................................................................................540
External Trigger Input Timing .............................................................................541
A/D Conversion Accuracy Definitions ................................................................543
A/D Conversion Accuracy Definitions ................................................................543
Example of Analog Input Circuit.........................................................................544
Example of Analog Input Protection Circuit........................................................546
Block Diagram of Flash Memory ........................................................................550
Mode Transition of Flash Memory ......................................................................551
Flash Memory Configuration...............................................................................553
(Internal Clock)....................................................................................................492
2
2
C Bus Formats ...................................................................................................514
C Bus Timing.....................................................................................................514
2
C Bus Interface 3 .................................................................498
Rev.2.00 May. 28, 2009 Page xxix of xxxviii
REJ09B0059-0200