DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 391

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 12 16-Bit Timer Pulse Unit (TPU)
12.5.5
PWM Modes
In PWM mode, PWM waveforms are output from the output pins. 0, 1, or toggle output can be
selected as the output level in response to compare match of each TGR.
Settings of TGR registers can output a PWM waveform in the range of 0% to 100% duty.
Designating TGR compare match as the counter clearing source enables the period to be set in that
register. All channels can be designated for PWM mode independently. Synchronous operation is
also possible.
There are two PWM modes, as described below.
PWM Mode 1:
PWM output is generated from the TIOCA and TIOCC pins by pairing TGRA with TGRB and
TGRC with TGRD. The value specified by bits IOA3 to IOA0 and IOC3 to IOC0 in TIOR is
output from the TIOCA and TIOCC pins at compare matches A and C, and the value specified by
bits IOB3 to IOB0 and IOD3 to IOD0 in TIOR is output at compare matches B and D. The initial
output value is the value set in TGRA or TGRC. When the set values of paired TGRs are identical,
the output value does not change even if a compare match occurs.
In PWM mode 1, a maximum 4-phase PWM output is possible.
PWM Mode 2:
PWM output is generated using one TGR as the periodic register and the others as duty registers.
The value specified in TIOR is output by means of compare matches. Upon counter clearing by a
synchronous register compare match, the output value of each pin is the initial value set in TIOR.
When the set values of the periodic and duty registers are identical, the output value does not
change even if a compare match occurs.
In PWM mode 2, a maximum 7-phase PWM output is possible by combined use with synchronous
operation.
The correspondence between PWM output pins and registers is shown in table 12.19.
Rev.2.00 May. 28, 2009 Page 351 of 732
REJ09B0059-0200