DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 312

IC H8S/2437 MCU FLASH 128QFP

DF2437FV

Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of DF2437FV

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.7.4
When the internal clock is changed, the changeover may cause FRC to be incremented. This
depends on the timing at which the clock is switched (bits CKS1 and CKS0 are rewritten). Table
10.3 shows the relationship between the timing and the FRC operation.
When an internal clock is used, the FRC clock is generated on detection of the falling edge of the
internal clock scaled from the system clock (φ). If the clock is changed when the old source is high
and the new source is low, as in case no. 3 in table 10.3, the changeover is regarded as a falling
edge that triggers the FRC clock, and FRC is incremented. Switching between an internal clock
and external clock can also cause FRC to be incremented.
Rev.2.00 May. 28, 2009 Page 272 of 732
REJ09B0059-0200
Figure 10.20 Conflict between OCRAR/OCRAF Write and Compare-Match
Switching of Internal Clock and FRC Operation
Compare-match signal
Internal write signal
OCRAR (OCRAF)
(When Automatic Addition Function is Used)
Address
OCR
FRC
φ
Automatic addition is not performed
because compare-match signals are disabled.
OCRAR (OCRAF)
address
Disabled
Old data
N
N
New data
N+1

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