DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 378

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.5
12.5.1
Each channel has TCNT and TGR. TCNT performs up-counting, and is also capable of free-
running operation, periodic counting, and external event counting. Each TGR can be used as an
input capture register or output compare register.
Counter Operation:
When one of bits CST0 to CST2 in TSTR is set to 1, TCNT for the corresponding channel starts
counting. TCNT can operate as a free-running counter, periodic counter, and so on.
• Example of Count Operation Setting Procedure
Rev.2.00 May. 28, 2009 Page 338 of 732
REJ09B0059-0200
Figure 12.6 shows an example of the count operation setting procedure.
Basic Functions
Operation
Select output compare register
Select counter clearing source
Figure 12.6 Example of Counter Operation Setting Procedure
Start count operation
Select counter clock
Operation selection
<Periodic counter>
Periodic counter
Set period
[1]
[2]
[3]
[4]
[5]
<Free-running counter>
Free-running counter
Start count operation
[1]
[2]
[3]
[4]
[5]
Select the counter
clock with bits
TPSC2 to TPSC0 in
TCR. At the same
time, select the
input clock edge
with bits CKEG1
and CKEG0 in TCR.
For periodic counter
operation, select the
TGR to be used as
the TCNT clearing
source with bits
CCLR2 to CCLR0 in
TCR.
Designate the TGR
selected in [2] as an
output compare
register by means of
TIOR.
Set the periodic
counter cycle in the
TGR selected in [2].
Set the CST bit in
TSTR to 1 to start
the counter
operation.