DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 273

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

This LSI has an on-chip 14-bit pulse-width modulator (PWM) timer with two output channels. It
can be connected to an external low-pass filter to operate as a 14-bit D/A converter.
9.1
• Division of pulse into multiple base cycles to reduce ripple
• Eight resolution settings
• Two base cycle settings
• Sixteen operating clocks (by combination of eight resolution settings and two base cycle
Figure 9.1 shows a block diagram of the PWMX (D/A) module.
PWM1420A_000020020300
The resolution can be set to 2, 64, 128, 256, 1024, 4096, or 16384 system clock cycles.
The base cycle can be set equal to T × 64 or T × 256, where T is the resolution.
settings)
PWX0
PWX1
Features
[Legend]
DACR:
DADRA:
DADRB:
DACNT:
Section 9 14-Bit PWM Timer (PWMX)
Select clock
PWMX D/A control register (6 bits)
PWMX D/A data register A (15 bits)
PWMX D/A data register B (15 bits)
PWMX D/A counter (14 bits)
Control
logic
Figure 9.1 Block Diagram of PWMX (D/A)
Internal clock
Base cycle compare match A
Fine–adjustment pulse addition
Base cycle compare match B
Fine–adjustment pulse addition
φ
φ/2, φ/64, φ/128, φ/256,
φ/1024, φ/4096, φ/16384
Base cycle overflow
Clock
A
B
Comparator A
Comparator B
DACNT
DACR
Rev.2.00 May. 28, 2009 Page 233 of 732
DADRA
DADRB
Internal data bus
Module data bus
Bus interface
REJ09B0059-0200