HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 107

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

3.3.2
The TLB uses a 4-way set associative scheme, so entries must be selected by index. VPN bits 16
to 12 and ASID bits in PTEH 4 to 0 are used as the index number regardless of the page size. The
index number can be generated in two different ways depending on the setting of the IX bit in
MMUCR.
1. When IX = 0, VPN bits 16 to 12 alone are used as the index number
2. When IX = 1, VPN bits 16 to 12 are EX-ORed with ASID bits 4 to 0 to generate a 5-bit index
The second method is used to prevent lowered TLB efficiency that results when multiple
processes run simultaneously in the same virtual address space (multiple virtual memory) and a
specific entry is selected by indexing of each process. Figures 3.5 and 3.6 show the indexing
schemes.
number
31
TLB Indexing
0
Virtual address
31
31
0
Virtual address
31
VPN(31–17)
VPN(31–17)
Index
Index
VPN(11–10)
17
Address array
VPN(11–10)
17
Address array
16
Figure 3.5 TLB Indexing (IX = 1)
Figure 3.6 TLB Indexing (IX = 0)
16
12
12
11
11
ASID(7–0)
ASID(7–0)
0
0
Exclusive-OR
V
V
Ways 0 to 3
Ways 0 to 3
PPN(31–10) PR(1–0) SZ C
PTEH register
PPN(3–0)
31
VPN
PR(1–0) SZ C
Data array
Rev. 4.00, 03/04, page 61 of 660
Data array
ASID(4 to 0)
10
0
D SH
D SH
7
ASID
0