HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 70

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Rev. 4.00, 03/04, page 24 of 660
Addressing
Mode
Register
indirect with
displacement
Indexed
register
indirect
GBR indirect
with
displacement
Indexed GBR
indirect
Instruction
Format
@(disp:4,
Rn)
@(R0, Rn) Effective address is sum of register Rn and
@(disp:8,
GBR)
@(R0,
GBR)
Effective Address Calculation Method
Effective address is register Rn contents with
4-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte), 2
(word), or 4 (longword), according to the
operand size.
R0 contents.
Effective address is register GBR contents
with 8-bit displacement disp added. After disp
is zero-extended, it is multiplied by 1 (byte), 2
(word), or 4 (longword), according to the
operand size.
Effective address is sum of register GBR and
R0 contents.
(zero-extended)
(zero-extended)
GBR
1/2/4
disp
GBR
1/2/4
disp
R0
Rn
R0
Rn
+
+
+
+
+ disp
+ disp
GBR + R0
Rn + R0
GBR
Rn
1/2/4
1/2/4
Calculation Formula
Byte: Rn + disp
Word: Rn + disp × 2
Longword: Rn + disp ×
4
Rn + R0
Byte: GBR + disp
Word: GBR + disp × 2
Longword: GBR + disp
× 4
GBR + R0